RM42L432

ACTIVE

16/32 Bit RISC Flash MCU, Arm Cortex-R4F

Product details

Frequency (MHz) 100 Flash memory (kByte) 384 RAM (kByte) 32 ADC type 12-bit (16ch) Number of GPIOs 45 UART 1 Features Hercules high-performance microcontroller TI functional safety category Functional Safety-Compliant Operating temperature range (°C) -40 to 105 Ethernet No PWM (Ch) 19 SPI 2 CAN (#) 2 Communication interface CAN, SPI, UART
Frequency (MHz) 100 Flash memory (kByte) 384 RAM (kByte) 32 ADC type 12-bit (16ch) Number of GPIOs 45 UART 1 Features Hercules high-performance microcontroller TI functional safety category Functional Safety-Compliant Operating temperature range (°C) -40 to 105 Ethernet No PWM (Ch) 19 SPI 2 CAN (#) 2 Communication interface CAN, SPI, UART
LQFP (PZ) 100 256 mm² 16 x 16
  • High-Performance Microcontroller for Safety-Critical Applications
    • Dual CPUs Running in Lockstep
    • ECC on Flash and RAM Interfaces
    • Built-In Self-Test for CPU and On-Chip RAMs
    • Error Signaling Module With Error Pin
    • Voltage and Clock Monitoring
  • ARM Cortex-R4 32-Bit RISC CPU
    • Efficient 1.66 DMIPS/MHz With 8-Stage Pipeline
    • 8-Region Memory Protection Unit (MPU)
    • Open Architecture With Third-Party Support
  • Operating Conditions
    • 100-MHz System Clock
    • Core Supply Voltage (VCC): 1.2-V Nominal
    • I/O Supply Voltage (VCCIO): 3.3-V Nominal
    • ADC Supply Voltage (VCCAD): 3.3-V Nominal
  • Integrated Memory
    • 384KB of Program Flash With ECC
    • 32KB of RAM With ECC
    • 16KB of Flash for Emulated EEPROM With ECC
  • Hercules Common Platform Architecture
    • Consistent Memory Map Across Family
    • Real-Time Interrupt (RTI) Timer (OS Timer)
    • 96-Channel Vectored Interrupt Module (VIM)
    • 2-Channel Cyclic Redundancy Checker (CRC)
  • Frequency-Modulated Phase-Locked Loop (FMPLL) With Built-In Slip Detector
  • IEEE 1149.1 JTAG Boundary Scan and ARM CoreSight Components
  • Advanced JTAG Security Module (AJSM)
  • Multiple Communication Interfaces
    • Two CAN Controllers (DCANs)
      • DCAN1 - 32 Mailboxes With Parity Protection
      • DCAN2 - 16 Mailboxes With Parity Protection
      • Compliant to CAN Protocol Version 2.0B
    • Multibuffered Serial Peripheral Interface (MibSPI) Module
      • 128 Words With Parity Protection
    • Two Standard Serial Peripheral Interface (SPI) Modules
    • UART (SCI) Interface With Local Interconnect Network (LIN 2.1) Interface Support
  • Next Generation High-End Timer (N2HET) Module
    • Up to 19 Programmable Pins
    • 128-Word Instruction RAM With Parity Protection
    • Includes Hardware Angle Generator
    • Dedicated High-End Timer Transfer Unit (HTU) With MPU
  • Enhanced Quadrature Encoder Pulse (eQEP) Module
    • Motor Position Encoder Interface
  • 12-Bit Multibuffered Analog-to-Digital Converter (ADC) Module
    • 16 Channels
    • 64 Result Buffers With Parity Protection
  • Up to 45 General-Purpose Input/Output (GPIO) Pins
    • 8 Dedicated Interrupt-Capable GPIO Pins
  • Package
    • 100-Pin Quad Flatpack (PZ) [Green]

All trademarks are the property of their respective owners.

  • High-Performance Microcontroller for Safety-Critical Applications
    • Dual CPUs Running in Lockstep
    • ECC on Flash and RAM Interfaces
    • Built-In Self-Test for CPU and On-Chip RAMs
    • Error Signaling Module With Error Pin
    • Voltage and Clock Monitoring
  • ARM Cortex-R4 32-Bit RISC CPU
    • Efficient 1.66 DMIPS/MHz With 8-Stage Pipeline
    • 8-Region Memory Protection Unit (MPU)
    • Open Architecture With Third-Party Support
  • Operating Conditions
    • 100-MHz System Clock
    • Core Supply Voltage (VCC): 1.2-V Nominal
    • I/O Supply Voltage (VCCIO): 3.3-V Nominal
    • ADC Supply Voltage (VCCAD): 3.3-V Nominal
  • Integrated Memory
    • 384KB of Program Flash With ECC
    • 32KB of RAM With ECC
    • 16KB of Flash for Emulated EEPROM With ECC
  • Hercules Common Platform Architecture
    • Consistent Memory Map Across Family
    • Real-Time Interrupt (RTI) Timer (OS Timer)
    • 96-Channel Vectored Interrupt Module (VIM)
    • 2-Channel Cyclic Redundancy Checker (CRC)
  • Frequency-Modulated Phase-Locked Loop (FMPLL) With Built-In Slip Detector
  • IEEE 1149.1 JTAG Boundary Scan and ARM CoreSight Components
  • Advanced JTAG Security Module (AJSM)
  • Multiple Communication Interfaces
    • Two CAN Controllers (DCANs)
      • DCAN1 - 32 Mailboxes With Parity Protection
      • DCAN2 - 16 Mailboxes With Parity Protection
      • Compliant to CAN Protocol Version 2.0B
    • Multibuffered Serial Peripheral Interface (MibSPI) Module
      • 128 Words With Parity Protection
    • Two Standard Serial Peripheral Interface (SPI) Modules
    • UART (SCI) Interface With Local Interconnect Network (LIN 2.1) Interface Support
  • Next Generation High-End Timer (N2HET) Module
    • Up to 19 Programmable Pins
    • 128-Word Instruction RAM With Parity Protection
    • Includes Hardware Angle Generator
    • Dedicated High-End Timer Transfer Unit (HTU) With MPU
  • Enhanced Quadrature Encoder Pulse (eQEP) Module
    • Motor Position Encoder Interface
  • 12-Bit Multibuffered Analog-to-Digital Converter (ADC) Module
    • 16 Channels
    • 64 Result Buffers With Parity Protection
  • Up to 45 General-Purpose Input/Output (GPIO) Pins
    • 8 Dedicated Interrupt-Capable GPIO Pins
  • Package
    • 100-Pin Quad Flatpack (PZ) [Green]

All trademarks are the property of their respective owners.

The RM42L432 device is a high-performance microcontroller for safety systems. The safety architecture includes dual CPUs in lockstep, CPU and Memory BIST logic, ECC on both the flash and the data SRAM, parity on peripheral memories, and loopback capability on peripheral I/Os.

The RM42L432 device integrates the ARM Cortex-R4 CPU. The CPU offers an efficient 1.66 DMIPS/MHz, and has configurations that can run up to 100 MHz, providing up to 166 DMIPS. The device operates in little-endian (LE) mode.

The RM42L432 device has 384KB of integrated flash and 32KB of data RAM. Both the flash and RAM have single-bit error correction and double-bit error detection. The flash memory on this device is a nonvolatile, electrically erasable, and programmable memory implemented with a 64-bit-wide data bus interface. The flash operates on a 3.3-V supply input (the same level as I/O supply) for all read, program, and erase operations. When in pipeline mode, the flash operates with a system clock frequency of up to 100 MHz. The SRAM supports single-cycle read and write accesses in byte, halfword, word, and double-word modes throughout the supported frequency range.

The RM42L432 device features peripherals for real-time control-based applications, including a Next Generation High-End Timer (N2HET) timing coprocessor with up to 19 I/O terminals and a 12-bit Analog-to-Digital Converter (ADC) supporting 16 inputs in the 100-pin package.

The N2HET is an advanced intelligent timer that provides sophisticated timing functions for real-time applications. The timer is software-controlled, using a small instruction set, with a specialized timer micromachine and an attached I/O port. The N2HET can be used for pulse-width-modulated outputs, capture or compare inputs, or GPIO. The N2HET is especially well suited for applications requiring multiple sensor information and drive actuators with complex and accurate time pulses. A High-End Timer Transfer Unit (HTU) can perform DMA-type transactions to transfer N2HET data to or from main memory. A Memory Protection Unit (MPU) is built into the HTU.

The Enhanced Quadrature Encoder Pulse (eQEP) module is used for direct interface with a linear or rotary incremental encoder to get position, direction, and speed information from a rotating machine as used in high-performance motion and position-control systems.

The device has a 12-bit-resolution MibADC with 16 channels and 64 words of parity-protected buffer RAM. The MibADC channels can be converted individually or can be grouped by software for sequential conversion sequences. There are three separate groupings. Each sequence can be converted once when triggered or configured for continuous conversion mode. The MibADC has a 10-bit mode for use when compatibility with older devices or faster conversion time is desired.

The device has multiple communication interfaces: one MibSPI, two SPIs, one UART/LIN, and two DCANs. The SPI provides a convenient method of serial high-speed communications between similar shift-register type devices. The UART/LIN supports the Local Interconnect standard 2.1 and can be used as a UART in full-duplex mode using the standard Non-Return-to-Zero (NRZ) format. The DCAN supports the CAN 2.0 (A and B) protocol standard and uses a serial, multimaster communication protocol that efficiently supports distributed real-time control with robust communication rates of up to 1 Mbps. The DCAN is ideal for applications operating in noisy and harsh environments (for example, automotive and industrial applications) that require reliable serial communication or multiplexed wiring.

The Frequency-Modulated Phase-Locked Loop (FMPLL) clock module is used to multiply the external frequency reference to a higher frequency for internal use. The FMPLL provides one of the five possible clock source inputs to the Global Clock Module (GCM). The GCM manages the mapping between the available clock sources and the device clock domains.

The device also has an External Clock Prescaler (ECP) module that when enabled, outputs a continuous external clock on the ECLK pin. The ECLK frequency is a user-programmable ratio of the peripheral interface clock (VCLK) frequency. This low-frequency output can be monitored externally as an indicator of the device operating frequency.

The Error Signaling Module (ESM) monitors all device errors and determines whether an interrupt is generated or the external nERROR pin is toggled when a fault is detected. The nERROR pin can be monitored externally as an indicator of a fault condition in the microcontroller.

The I/O Multiplexing and Control Module (IOMM) allows the configuration of the input/output pins to support alternate functions. See for a list of the pins that support multiple functions on this device.

With integrated safety features and a wide choice of communication and control peripherals, the RM42L432 device is an ideal solution for real-time control applications with safety-critical

The RM42L432 device is a high-performance microcontroller for safety systems. The safety architecture includes dual CPUs in lockstep, CPU and Memory BIST logic, ECC on both the flash and the data SRAM, parity on peripheral memories, and loopback capability on peripheral I/Os.

The RM42L432 device integrates the ARM Cortex-R4 CPU. The CPU offers an efficient 1.66 DMIPS/MHz, and has configurations that can run up to 100 MHz, providing up to 166 DMIPS. The device operates in little-endian (LE) mode.

The RM42L432 device has 384KB of integrated flash and 32KB of data RAM. Both the flash and RAM have single-bit error correction and double-bit error detection. The flash memory on this device is a nonvolatile, electrically erasable, and programmable memory implemented with a 64-bit-wide data bus interface. The flash operates on a 3.3-V supply input (the same level as I/O supply) for all read, program, and erase operations. When in pipeline mode, the flash operates with a system clock frequency of up to 100 MHz. The SRAM supports single-cycle read and write accesses in byte, halfword, word, and double-word modes throughout the supported frequency range.

The RM42L432 device features peripherals for real-time control-based applications, including a Next Generation High-End Timer (N2HET) timing coprocessor with up to 19 I/O terminals and a 12-bit Analog-to-Digital Converter (ADC) supporting 16 inputs in the 100-pin package.

The N2HET is an advanced intelligent timer that provides sophisticated timing functions for real-time applications. The timer is software-controlled, using a small instruction set, with a specialized timer micromachine and an attached I/O port. The N2HET can be used for pulse-width-modulated outputs, capture or compare inputs, or GPIO. The N2HET is especially well suited for applications requiring multiple sensor information and drive actuators with complex and accurate time pulses. A High-End Timer Transfer Unit (HTU) can perform DMA-type transactions to transfer N2HET data to or from main memory. A Memory Protection Unit (MPU) is built into the HTU.

The Enhanced Quadrature Encoder Pulse (eQEP) module is used for direct interface with a linear or rotary incremental encoder to get position, direction, and speed information from a rotating machine as used in high-performance motion and position-control systems.

The device has a 12-bit-resolution MibADC with 16 channels and 64 words of parity-protected buffer RAM. The MibADC channels can be converted individually or can be grouped by software for sequential conversion sequences. There are three separate groupings. Each sequence can be converted once when triggered or configured for continuous conversion mode. The MibADC has a 10-bit mode for use when compatibility with older devices or faster conversion time is desired.

The device has multiple communication interfaces: one MibSPI, two SPIs, one UART/LIN, and two DCANs. The SPI provides a convenient method of serial high-speed communications between similar shift-register type devices. The UART/LIN supports the Local Interconnect standard 2.1 and can be used as a UART in full-duplex mode using the standard Non-Return-to-Zero (NRZ) format. The DCAN supports the CAN 2.0 (A and B) protocol standard and uses a serial, multimaster communication protocol that efficiently supports distributed real-time control with robust communication rates of up to 1 Mbps. The DCAN is ideal for applications operating in noisy and harsh environments (for example, automotive and industrial applications) that require reliable serial communication or multiplexed wiring.

The Frequency-Modulated Phase-Locked Loop (FMPLL) clock module is used to multiply the external frequency reference to a higher frequency for internal use. The FMPLL provides one of the five possible clock source inputs to the Global Clock Module (GCM). The GCM manages the mapping between the available clock sources and the device clock domains.

The device also has an External Clock Prescaler (ECP) module that when enabled, outputs a continuous external clock on the ECLK pin. The ECLK frequency is a user-programmable ratio of the peripheral interface clock (VCLK) frequency. This low-frequency output can be monitored externally as an indicator of the device operating frequency.

The Error Signaling Module (ESM) monitors all device errors and determines whether an interrupt is generated or the external nERROR pin is toggled when a fault is detected. The nERROR pin can be monitored externally as an indicator of a fault condition in the microcontroller.

The I/O Multiplexing and Control Module (IOMM) allows the configuration of the input/output pins to support alternate functions. See for a list of the pins that support multiple functions on this device.

With integrated safety features and a wide choice of communication and control peripherals, the RM42L432 device is an ideal solution for real-time control applications with safety-critical

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More information

Hercules RM42L432 is certified by TÜV SÜD to be capable of achieving IEC 61508 SIL 3 helping to make it easier to develop functional safety applications. Download certificate now.

Technical documentation

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Type Title Date
* Data sheet RM42L432 16- and 32-Bit RISC Flash Microcontroller datasheet (Rev. B) PDF | HTML 30 Jun 2015
* Errata RM42x Microcontroller Silicon Errata (Silicon Revision A) (Rev. F) 31 May 2016
* Errata RM42x Microcontroller Silicon Errata (Silicon Revision B) (Rev. A) 31 May 2016
* User guide RM42x 16/32-Bit RISC Flash Microcontroller Technical Reference Manual (Rev. C) 01 Mar 2018
Functional safety information Certification for Functional Safety Hardware Process (Rev. B) 09 Jun 2022
More literature Hercules™ Diagnostic Library Test Automation Unit User Guide (Rev. B) PDF | HTML 09 Jan 2020
More literature HALCoGen-CSP 04.07.01 (Rev. C) PDF | HTML 08 Jan 2020
Functional safety information HALCoGen-CSP Installation Guide (Rev. B) PDF | HTML 08 Jan 2020
Functional safety information HALCoGen-CSP User's Guide (Rev. C) PDF | HTML 08 Jan 2020
Functional safety information Hercules Diagnostic Library -TAU Installation Guide (Rev. B) PDF | HTML 08 Jan 2020
User guide Hercules Diagnostic Library CSP Without LDRA 29 Oct 2019
More literature Diagnostic Library CSP Release Notes 17 Oct 2019
Functional safety information SafeTI™ Hercules™ Diagnostic Library Release Notes (Rev. A) 24 Sep 2019
Application note Hercules PLL Advisory SSWF021#45 Workaround (Rev. B) PDF | HTML 09 Sep 2019
Application note CAN Bus Bootloader for Hercules Microcontrollers PDF | HTML 21 Aug 2019
Application note HALCoGen CSP Without LDRA Release_Notes 19 Aug 2019
User guide HALCoGen-CSP Without LDRA Installation Guide PDF | HTML 19 Aug 2019
User guide HALCoGen-CSP Without LDRA User's Guide PDF | HTML 19 Aug 2019
User guide Hercules Diagnostic Library - Without LDRA Installation Guide PDF | HTML 19 Aug 2019
User guide Hercules™ Diag Lib Test Automation Unit Without LDRA User's Guide PDF | HTML 19 Aug 2019
Functional safety information Certification for SafeTI Functional Safety Hardware Process (Rev. A) 07 Jun 2019
Application note Interfacing the Embedded 12-Bit ADC in a TMS570LS31x/21x and RM4x Series MCUs (Rev. A) 20 Apr 2018
Application note FreeRTOS on Hercules Devices_new 19 Apr 2018
Application note Sharing FEE Blocks Between the Bootloader and the Application 07 Nov 2017
Application note Sharing Exception Vectors on Hercules™ Based Microcontrollers 27 Mar 2017
Application note Hercules AJSM Unlock (Rev. A) PDF | HTML 19 Oct 2016
Application note How to Create a HALCoGen Based Project For CCS (Rev. B) 09 Aug 2016
Application note Using the CRC Module on Hercules™-Based Microcontrollers 04 Aug 2016
Application note Using the SPI as an Extra UART Transmitter 26 Jul 2016
Functional safety information Functional Safety Audit: SafeTI Functional Safety Hardware Development (Rev. A) 25 Apr 2016
Application note High Speed Serial Bus Using the MibSPIP Module on Hercules-Based MCUs 22 Apr 2016
Certificate TUEV SUED Certification for RM42x (Rev. A) 18 Feb 2016
Functional safety information Enabling Functional Safety Using SafeTI Diagnostic Library 18 Dec 2015
White paper Hercules™ MCU: Features Applicable to Use in High-Speed Rail 02 Nov 2015
Functional safety information Safety Manual for RM42x/41x Hercules ARM-Based Safety Critical MCUs (Rev. B) 26 Oct 2015
White paper Extending TI’s Hercules MCUs with the integrated flexible HET 29 Sep 2015
White paper How to improve system availability and minimize down time with Hercules™ MCUs? 03 Sep 2015
Application note PWM Generation and Input Capture Using HALCoGen N2HET Module 30 Jun 2015
Functional safety information Foundational Software for Functional Safety 12 May 2015
Application note Sine Wave Generation Using PWM With Hercules N2HET and HTU 12 May 2015
Application note Triangle/Trapezoid Wave Generation Using PWM With Hercules N2HET 01 May 2015
Application note Nested Interrupts on Hercules ARM Cortex-R4/5-Based Microncontrollers 23 Apr 2015
White paper Latch-Up White Paper PDF | HTML 22 Apr 2015
Application note Interrupt and Exception Handling on Hercules ARM Cortex-R4/5-Based MCUs 20 Apr 2015
Application note Monitoring PWM Using N2HET 02 Apr 2015
Application note Hercules SCI With DMA 22 Mar 2015
Certificate TÜV NORD Certificate for Functional Safety Software Development Process 03 Feb 2015
Functional safety information Calculating Equivalent Power-on-Hours for Hercules Safety MCUs 26 Jan 2015
Application note Limiting Clamp Currents on TMS470/TMS570 Digital and Analog Inputs (Rev. A) 08 Dec 2014
Functional safety information Migrating from RM48x or RM46x to RM42x Safety MCUs (Rev. A) 22 Sep 2014
Functional safety information TUV SUD ISO-13849 Safety Architecture Concept Study 02 Jul 2014
More literature HaLCoGen Release Notes 25 Jun 2014
Application note Interfacing TPS65381 With Hercules Microcontrollers (Rev. A) 14 Feb 2014
Functional safety information IEC 60730 and UL 1998 Safety Standard Compliance Made Easier with TI Hercules 03 Oct 2013
Application note CAN Bus Bootloader for RM42 MCU 16 Sep 2013
Application note SPI Bootloader for Hercules RM42 MCU 16 Sep 2013
Application note UART Bootloader for Hercules RM42 MCU 16 Sep 2013
White paper Model-Based Tool Qualification of the TI C/C++ ARM® Compiler 06 Jun 2013
Functional safety information Accelerating safety-certified motor control designs (Rev. A) 04 Oct 2012
Application note Initialization of the TMS570LS043x, 570LS033x & RM42L432 Hercules ARM Cortex-R4 26 Sep 2012
User guide RM42x Hercules Development Kit (HDK) User's Guide 14 Sep 2012
Application note Hercules Family Frequency Slewing to Reduce Voltage and Current Transients 05 Jul 2012
Application note Basic PBIST Configuration and Influence on Current Consumption (Rev. C) 12 Apr 2012
Application note Verification of Data Integrity Using CRC 17 Feb 2012
Functional safety information Important ARM Ltd Application Notes for TI Hercules ARM Safety MCUs 17 Nov 2011
Functional safety information Execution Time Measurement for Hercules ARM Safety MCUs (Rev. A) 04 Nov 2011
Application note Use of All 1'’s and All 0's Valid in Flash EEPROM Emulation 27 Sep 2011
Application note 3.3 V I/O Considerations for Hercules Safety MCUs (Rev. A) 06 Sep 2011
Functional safety information ADC Source Impedance for Hercules ARM Safety MCUs (Rev. B) 06 Sep 2011
Functional safety information Configuring a CAN Node on Hercules ARM Safety MCUs 06 Sep 2011
Functional safety information Configuring the Hercules ARM Safety MCU SCI/LIN Module for UART Communication (Rev. A) 06 Sep 2011
Functional safety information Leveraging the High-End Timer Transfer Unit on Hercules ARM Safety MCUs (Rev. A) 06 Sep 2011
Functional safety information Hercules™ Microcontrollers: Real-time MCUs for safety-critical products 02 Sep 2011
Application note ECC Handling in TMSx70-Based Microcontrollers 23 Feb 2011
User guide TI ICEPick Module Type C Reference Guide Public Version 17 Feb 2011
Functional safety information Generating Operating System Tick Using RTI on a Hercules ARM Safety MCU 13 Jul 2010
Functional safety information Usage of MPU Subregions on TI Hercules ARM Safety MCUs 10 Mar 2010
White paper Discriminating between Soft Errors and Hard Errors in RAM White Paper 04 Jun 2008

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